Masks are conventionally used to form desired films, layers, structures, and the like during the processing of a semiconductor arrangement. As illustrated in FIG. 1, a conventional two-level semiconductor arrangement 1 includes a semiconductor substrate 10. A first active region 18, a dielectric layer 20, and a second active region 28 are disposed on or over semiconductor substrate 10. In forming the second active region 28, a mask 30, as illustrated in FIG. 2, is applied to the dielectric layer 20. Application of mask 30 on dielectric layer 20 occurs at the highest point 21 of the surface of the dielectric layer 20 underlying mask 30.
Physical contact between mask 30 and the dielectric layer 20 at the highest point 21 risks damage to the dielectric layer 20, such as by scratching the dielectric layer 20. Damage to the dielectric layer 20 has not been a problem for conventional semiconductor arrangements, such as that illustrated in FIG. 1, because mask 30 contacts the dielectric layer 20 at an inactive surface portion 23 of the dielectric layer 20, which is an area that will be free of active semiconductor circuitry. The second active region 28 will ultimately reside on an active portion 24 of the dielectric layer 20, which is not contacted by the mask 30. Damage to the inactive surface portion 23 of the dielectric layer 20 can be removed without great difficulty by subsequent processing, such as by dicing. Alternatively, in some semiconductor arrangements, damage to the inactive surface portion 23 of the dielectric layer 20 can be ignored without affecting performance.
Recently, the increased demand for larger active portions 24 has led to the positioning of active regions closer to the edge of the semiconductor arrangement. This configuration more fully utilizes the substrate real estate. Such an arrangement is illustrated in FIG. 3: the second active region 28 is closer to the edge 25 of the dielectric layer 20 in the semiconductor arrangement of FIG. 3 than it is in the semiconductor arrangement of FIG. 1.
In forming second active region 28, mask 30 is again applied to the semiconductor arrangement 1, as illustrated in FIG. 4. The mask 30 causes damage to the active portion 24 of the dielectric layer 20, however, where the second active region 28 will ultimately reside. Unfortunately, this damage cannot be ignored because it affects formation of the second active region 28, thereby affecting performance of the semiconductor chip. Although further processing can repair defects of the damaged second active region 28, such repair processing incurs additional time and expense and is therefore undesirable.
The deficiencies of the processing of conventional semiconductor arrangements show that a need exists for a new semiconductor arrangement which limits damage caused by physical contact between a mask and a portion of the dielectric layer that will ultimately comprise a second active region.